Yangians, Grassmannians and T-duality

We investigate the Yangian symmetry of scattering amplitudes in N=4 super Yang-Mills theory and show that its formulations in twistor and momentum twistor space can be interchanged. In particular we show that the full symmetry can be thought of as the Yangian of the dual superconformal algebra, annihilating the amplitude with the MHV part factored out. The equivalence of this picture with the one where the ordinary superconformal symmetry is thought of as fundamental is an algebraic expression of T-duality. Motivated by this, we analyse some recently proposed formulas, which reproduce different contributions to amplitudes through a Grassmannian integral. We prove their Yangian invariance by directly applying the generators.Comment: 28 pages, 1 figure; v2: minor correction

Review of recent advances in local approaches applied to pre-stressed components under fatigue loading

Fatigue strength of mechanical components in the high cycle regime depends on both the applied loading and the intensity of any residual stress field induced by either non-homogeneous plastic deformation or the solidification of a local portion of material due to welding operations. In presence of geometric variations that are amenable to being modelled as a sharp V-notch, the residual stress distribution near the notch tip is singular and follows the same form as the solution obtained by Williams in 1952 where the intensity of the asymptotic stress field is quantified by the notch stress intensity factor (NSIF). However, the residual stress varies during fatigue loading and a stable value may be reached. Numerical models have been developed for the calculation of the residual NSIFs and their variation under fatigue loading. Taking advantage of these models, new local approaches have also been recently developed which are able to predict the fatigue strength of pre-stressed notched components. The present paper provides a brief review of such recent advances

uRT51: An Embedded Real-Time processor implemented on FPGA devices

In this paper we describe and evaluate the main features of the uRT51 processor. The uRT51 processor was designed for embedded realtime control applications. It is a processor architecture that incorporates the specific functions of a real-time system in hardware. It was described using synthesizable VHDL and it was implemented on FPGA devices. We describe how the uRT51 processor supports time, events, task and priorities. The performance of the uRT51 processor is evaluated using a control application as a case study. The experiments show that the uRT51 processor scheduling features outperform the ones obtained using a traditional RTOS-based real-time system.Fil: Cayssials, Ricardo Luis. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca; Argentina. Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras; ArgentinaFil: Duval, M,. Provincia de Buenos Aires. Gobernación. Comisión de Investigaciones Científicas; Argentina. Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras; ArgentinaFil: Ferro, Edgardo Carlos. Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca; ArgentinaFil: Alimenti, O.. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca; Argentina. Universidad Nacional del Sur. Departamento de Ingeniería Eléctrica y de Computadoras; Argentin